| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2009-05-15 | add-new-random-sampling-scheme.patchHEADmaster | Andy Green | 69 | -16989/+20857 |
| 2007-11-30 | recooked with production pinout | warmcat | 44 | -9226/+9334 |
| 2007-11-30 | 8 x 3 x 9 inverter chains with toggling mixer at 24MHz | warmcat | 65 | -19828/+20344 |
| 2007-11-24 | Initial commit, 24 osc 8-bit production pinout | warmcat | 201 | -0/+50871 |
 |
index : whirlygig-cpld | |
| Whirlygig RNG CPLD VHDL | Andy Green |
| summaryrefslogtreecommitdiff |